1. Technical Field
The present invention relates to thin film capacitors, more particularly to thin-film capacitors formed on ceramic substrates.
2. Related Art
As integrated circuits (IC) operate at higher and higher frequencies, noise in the power and ground lines associated with inductance and parasitic capacitance becomes an increasingly important problem. The noise problem requires the use of additional decoupling capacitors in order to provide a stable signal to an IC. Higher operating frequencies combined with lower operating voltages also require that voltage response times to the IC be faster and allowable voltage variations (ripple) be smaller. For example, as a microprocessor begins a calculation, it calls for power. If the response time of the voltage supply is too slow, the microprocessor will experience a voltage drop or power droop that exceeds the allowable ripple voltage and the IC will malfunction. Additionally, as the IC powers up, a slow response time will result in power overshoot. Power droop and overshoot are controlled by the use of capacitors that provide or absorb power within the appropriate response time.
Capacitors for decoupling and dampening power droop or overshoot are generally placed as close to the IC as possible in order to improve their performance. Conventional designs have capacitors surface mounted on a printed wiring board (PWB) and clustered around the IC. In this arrangement, a large number of capacitors requires complex electrical routing, which leads to inductance. As frequencies increase and operating voltages continue to drop, power increases and higher capacitance must be supplied at increasingly lower inductance levels. Placing the capacitors on the opposite side of the PWB (directly under the IC) reduces inductance somewhat. However, trends in IC size, speed, voltage, power, and packaging mean that conventional approaches will eventually be insufficient in supplying the capacitance within desired inductance and response times.
U.S. Pat. No. 6,477,034 to Chakravorty et al., discloses a capacitor having conductive paths therethrough and providing capacitance between at least two of the conductive paths, the capacitor comprising: a substrate layer; a first conductive layer deposited on the substrate layer, a first portion of the first conductive layer providing a first electrode region; a second conductive layer, a portion of the second conductive layer forming a second electrode region; and a dielectric layer disposed between the first and second conductive layers wherein capacitive regions are formed between the first electrode region and the second electrode region, wherein at least two conductive paths are provided through the substrate layer to provide conductive paths between opposite sides of the capacitor.
Thus, an object of the present invention is to provide capacitor(s) and method(s) for forming capacitor(s) that have desirable electrical and physical properties, such as low inductance and response times.